Frequency control and Timing reference
Applications include satellite transport (bandwidth), fixed or mobile satellite service, and service-enabling components such as terminals, handsets, and tail circuits with engineering services to integrate, operate, and maintain the solution. Applications include Emergency response and disaster recovery communications systems , Satellite-based backup communications network , Distributed distance learning network and Communications on the move solutions for Defence applications
In Packet based timing, the prediction, monitoring and management of Packet Delay Variation (PDV) is complex, challenging, potentially costly and still open to random ‘network noise’ events.
Placing a predictable, stable and cost effective local clock at the client node can greatly improve the odds in dealing with network noise – increased client robustness allows a timing to be deployed across larger and less managed networks, reducing the overall cost of a timing solution.
Packet based timing technologies work on the two way exchange of timing information between a Master Clock and Slave (or Client) Clock. The 1588 protocol works on the assumption that this two way exchange is symmetric (i.e. it expects that the Packet Delay from Master to Slave and Slave to Master is the same). However, in the majority of wide area networks this is not the case and the phenomena of Packet Delay Variation (PDV) introduces noise into the Client clock. Without severely limiting the scale of the network or introducing complex management schemes, deriving accurate frequency and phase information from the packet network is a challenge.
There are a number of approaches described in the 1588 protocol that can be taken to delivering timing over a packet network. In broad terms these approached can be divided into the Ordinary Clock approach and the Transparent Clock approach.
Ordinary Clock approach: In the Ordinary Clock approach the timing information is sent from the Master clock to the Slave clock without adjustment being made to the time stamp information by intervening nodes – routers in the path between the master and slave do not tell the slave anything about their behaviour. The advantage of this approach is that the disruption to the existing network is minimal and service providers can deploy 1588 over an existing network – A possible disadvantage is that the Slave needs to be robust in the presence of PDV.
Transparent Clock approach: In the Transparent Clock approach the timing information is updated as it travels from the master to the slave – routers in the path between the master and slave can make adjustments to the packet to tell the slave about their behaviour. The advantage of the Transparent Clock is that the deployment can self-correct network disruptions far more easily – a disadvantage is that service providers are faced with the possibility of expensive ‘forklift upgrades’ of existing networks
Vectron matches the stability characteristics of its oscillators with the requirements of 1588 client clocks – this is done by design, but also through a system level verification of the oscillators’ suitability in the target application. Choosing oscillators for 1588 applications is in many ways similar to selecting devices to support SONET/SDH ‘stratum’ level applications. However the role of PDV and any corresponding packet filtering used in a Packet Equipment Clock (PEC) needs to be considered also, since the system loop filter bandwidth is not necessarily predefined in the same way as SONET/SDH.
The SATCOM and “1 ppm Forever” series of Temperature Compensated Crystal Oscillators (TCXO’s) are available in frequencies from 0.5 MHz to 160MHz. These series offer performance for short term stability, phase noise, G sensitivity, ageing and temperature stability normally only associated with Oven Controlled Crystal Oscillators (OCXO’s), while consuming typically < 20 mA. With over 500,000 units produced, Vectron International has more experience with this type of TCXO then the rest of the industry combined.
Integration of active functions within the RF chain allow improved size and performance characteristics to be achieved.
VCOS-for example -By integrating the buffer amplifier and resonator and providing a single 5V supply, the RFVC1800 VCO reduces component count, streamlines engineering and promotes ease-of-use for global customers. Additionally, by delivering excellent phase noise performance and broadband capabilities, the RFVC1800 provides a highly integrated multi-purpose VCO solution that meets or exceeds the stringent design requirements of engineers across multiple RF applications. Manufactured on Qorvo's Gallium Arsenide (GaAs) Hetero-junction Bipolar Transistor (HBT) process and packaged in a small 4 x 4 mm QFN package, the RFVC1800 broadband VCO is optimised for use in radar, military communications, satellite communications, test instrumentation and industrial/medical applications.
For signal enhancement and isolation between functions many chip and module amplification options are available.